전체 Analog Digital Communication Processor Memory Etc 제목 주저자 작성일 조회 67 A 28nm 64Kb Exponent-MAX-Pruning based Floating-Point eDRAM CIM Macro with Ver.. Ungbin Oh 26.04.25 23 66 High-Side Current Sensing Interface with Low-Offset Chopped-CBIA for Battery M.. 박판기 26.04.24 24 65 D-band SPST and SPDT Switches in 28-nm CMOS Technology 제송미 26.04.24 22 64 A Neuromorphic Compute-in-Memory Processor for Efficient Acceleration of SlipR.. Seol Hyeon Kim 26.04.24 44 63 A High-Isolation Compact W-Band Switched-Neutralized SPDT Switch 주석준 26.04.24 26 62 A Pattern-Dependent Pulse Filtering Technique for Low-Jitter Injection-Locked .. 김준학 26.04.24 22 61 Ka-Band Reconfigurable 4-Way Active Power Divider for Phased Array Signal Dist.. 김태연 26.04.23 31 60 Self-Interference-Tolerant Receiver for Shared-Aperture In-Band Full-Duplex Ar.. 임현학 26.04.23 25 59 Active Cell Balancing Using Flyback Converter Lee junseok 26.04.22 24 58 Ka-Band Phased array Beamforming Using Dual mode Common-Leg Channel 이정은 26.04.22 36 57 Memory Test System IC and its Built-In Self-Test Architecture 박종호 26.04.22 29 56 D-band Wideband Joint-Injection Mixer 신용국 26.04.20 33 55 A 4.8 – 36.0 GHz Inverter-based Variable-Gain Amplifier With PMOS Varistor in .. 성동현 26.04.17 38 54 Design of D-band on-chip antennas and switches for B5G communication and rada.. 양지민 26.04.16 28 53 A 28nm Reconfigurable Security Processor with Unified MAC Array for Private I.. Suheun Moon 26.04.15 38 52 A Double Step-Down Converter with Perturb & Observe MPPT Technique in High-Vol.. Tae-Ryeong Kim 26.04.14 24 51 A Dual-Mode Comparator and Digital Time-Domain Reference in 2-Then-1b/Step SAR.. 서지택 26.04.14 26 50 A High-Efficiency Low-Power 6MS/s SAR ADC with Double Rail-to-Rail Operation 서지택 26.04.14 26 49 Design of Radiation-Hardened Circuit Blocks in RF Receiver 이종호 26.04.14 27 48 Design and Optimization of Radio-Frequency Receiver with Modified Genetic Alg.. 신호연 26.04.14 23 1 2 3 4 5 6 통합 검색어
