Chip Design Contest(CDC)

Design Automation of High-Speed ADC using Template-optimization-hybrid Layout Generator and Constrained Discrete Bayesian Optimization

• 논문번호 : 202403065
• 주저자 : 김형진
• 소속 : KAIST
• 지도교수 : 류승탁
• 전시담당자 : 김형진(gudwls2525@kaist.ac.kr)